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author | David Green <david.green@arm.com> | 2022-06-20 19:11:57 +0100 |
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committer | David Green <david.green@arm.com> | 2022-06-20 19:11:57 +0100 |
commit | c0ecbfa4fdf0906745679c1262b08dc4cdbb5537 (patch) | |
tree | 90477ecfbdbf7b35ff35cc258bc39c301fdcb5b6 /llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp | |
parent | 452db157c963b2897a0882e3bb05ef845b9e4015 (diff) | |
download | llvm-c0ecbfa4fdf0906745679c1262b08dc4cdbb5537.zip llvm-c0ecbfa4fdf0906745679c1262b08dc4cdbb5537.tar.gz llvm-c0ecbfa4fdf0906745679c1262b08dc4cdbb5537.tar.bz2 |
[AArch64] Known bits for AArch64ISD::DUP
An AArch64ISD::DUP is just a splat, where the known bits for each lane
are the same as the input. This teaches that to computeKnownBitsForTargetNode.
Problems arise for constants though, as a constant BUILD_VECTOR can be
lowered to an AArch64ISD::DUP, which SimplifyDemandedBits would then
turn back into a constant BUILD_VECTOR leading to an infinite cycle.
This has been prevented by adding a isTargetCanonicalConstantNode node
to prevent the conversion back into a BUILD_VECTOR.
Differential Revision: https://reviews.llvm.org/D128144
Diffstat (limited to 'llvm/lib/DebugInfo/CodeView/SymbolSerializer.cpp')
0 files changed, 0 insertions, 0 deletions