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| author | Azharuddin Mohammed <azharudd@codeaurora.org> | 2017-03-12 14:02:32 +0000 |
|---|---|---|
| committer | Azharuddin Mohammed <azharudd@codeaurora.org> | 2017-03-12 14:02:32 +0000 |
| commit | 473b75c3d51d7eaf52ae678d0c2f576ea3306a5a (patch) | |
| tree | 1ebda5742c9e566ff747bce7ed8104aacd5fb962 /llvm/lib/DebugInfo/CodeView/ModuleSubstreamVisitor.cpp | |
| parent | 293dfb97680001b1c4935c5a26fc252f169bb786 (diff) | |
| download | llvm-473b75c3d51d7eaf52ae678d0c2f576ea3306a5a.zip llvm-473b75c3d51d7eaf52ae678d0c2f576ea3306a5a.tar.gz llvm-473b75c3d51d7eaf52ae678d0c2f576ea3306a5a.tar.bz2 | |
Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg
Summary:
A53 scheduler causes an assertion failure on all CRC instructions:
include/llvm/CodeGen/MachineInstr.h:280: const llvm::MachineOperand
&llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i <
getNumOperands() && "getOperand() out of range!"' failed.
The case statements corresponding to CRC instructions are incorrect and should
be removed.
Also adding a testcase while on this.
Reviewers: t.p.northover, javed.absar, apazos, rengolin
Reviewed By: rengolin
Subscribers: evandro, aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D30274
llvm-svn: 297582
Diffstat (limited to 'llvm/lib/DebugInfo/CodeView/ModuleSubstreamVisitor.cpp')
0 files changed, 0 insertions, 0 deletions