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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-02-26 15:34:47 +0700
committerGitHub <noreply@github.com>2025-02-26 15:34:47 +0700
commit1a114fa302b48fc761a58a8d3be5962d92fa581b (patch)
tree7ffaae3824a09adaa0a998200886274b55113e5a /llvm/lib/CodeGen/VirtRegMap.cpp
parente160c35c9ec69c099daeffdbca3cf4c94d3e05b9 (diff)
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RegAlloc: Use new approach to handling failed allocations (#128469)
This fixes an assert after allocation failure. Rather than collecting failed virtual registers and hacking on the uses after the fact, directly hack on the uses and rewrite the registers to the dummy assignment immediately. Previously we were bypassing LiveRegMatrix and directly assigning in the VirtRegMap. This resulted in inconsistencies where illegal overlapping assignments were missing. Rather than try to hack in some system to manage these in LiveRegMatrix (i.e. hacking around cases with invalid iterators), avoid this by directly using the physreg. This should also allow removal of special casing in virtregrewriter for failed allocations.
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp19
1 files changed, 3 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 4e4c89e..0fc3e5d 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -88,9 +88,7 @@ void VirtRegMap::assignVirt2Phys(Register virtReg, MCRegister physReg) {
assert(!Virt2PhysMap[virtReg] &&
"attempt to assign physical register to already mapped "
"virtual register");
- assert((!getRegInfo().isReserved(physReg) ||
- MF->getProperties().hasProperty(
- MachineFunctionProperties::Property::FailedRegAlloc)) &&
+ assert(!getRegInfo().isReserved(physReg) &&
"Attempt to map virtReg to a reserved physReg");
Virt2PhysMap[virtReg] = physReg;
}
@@ -598,9 +596,6 @@ void VirtRegRewriter::rewrite() {
SmallVector<Register, 8> SuperDefs;
SmallVector<Register, 8> SuperKills;
- const bool IsValidAlloc = !MF->getProperties().hasProperty(
- MachineFunctionProperties::Property::FailedRegAlloc);
-
for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
MBBI != MBBE; ++MBBI) {
LLVM_DEBUG(MBBI->print(dbgs(), Indexes));
@@ -620,8 +615,7 @@ void VirtRegRewriter::rewrite() {
assert(Register(PhysReg).isPhysical());
RewriteRegs.insert(PhysReg);
- assert((!MRI->isReserved(PhysReg) || !IsValidAlloc) &&
- "Reserved register assignment");
+ assert(!MRI->isReserved(PhysReg) && "Reserved register assignment");
// Preserve semantics of sub-register operands.
unsigned SubReg = MO.getSubReg();
@@ -696,14 +690,7 @@ void VirtRegRewriter::rewrite() {
// Rewrite. Note we could have used MachineOperand::substPhysReg(), but
// we need the inlining here.
MO.setReg(PhysReg);
-
- // Defend against generating invalid flags in allocation failure
- // scenarios. We have have assigned a register which was undefined, or a
- // reserved register which cannot be renamable.
- if (LLVM_LIKELY(IsValidAlloc))
- MO.setIsRenamable(true);
- else if (MO.isUse())
- MO.setIsUndef(true);
+ MO.setIsRenamable(true);
}
// Add any missing super-register kills after rewriting the whole