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authorJack Carter <jcarter@mips.com>2012-10-09 23:29:45 +0000
committerJack Carter <jcarter@mips.com>2012-10-09 23:29:45 +0000
commit543fdf8544d813d8cc3b16b6b4ddcffdf5443dd8 (patch)
tree3625d556922a8a3f81438a9d644b77136bd9cf1b /llvm/lib/CodeGen/TargetSchedule.cpp
parentcb28f9d7adfc51225fe1553052608e5a5c0442b6 (diff)
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Initial assembler implementation of Mips load address macro
This patch provides initial implementation of load address macro instruction for Mips. We have implemented two kinds of expansions with their variations depending on the size of immediate operand: 1) load address with immediate value directly: * la d,j => addiu d,$zero,j (for -32768 <= j <= 65535) * la d,j => lui d,hi16(j) ori d,d,lo16(j) (for any other 32 bit value of j) 2) load load address with register offset value * la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535) * la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j) ori d,d,lo16(j) addu d,d,s This patch does not cover the case when the address is loaded from the value of the label or function. Contributer: Vladimir Medic llvm-svn: 165561
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