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authorMatt Arsenault <Matthew.Arsenault@amd.com>2021-01-14 10:30:55 -0500
committerMatt Arsenault <Matthew.Arsenault@amd.com>2021-02-11 14:08:59 -0500
commite3c6fa36119ea428b17cef468e4aceee786433bf (patch)
tree673610232b7aced3ec73a3833cccf358b4744d6d /llvm/lib/CodeGen/TargetPassConfig.cpp
parent0bfa4ac6c6fceffcffb3ae44027859cf6f5e06c0 (diff)
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AMDGPU: Restrict soft clause bundling at half of the available regs
Fixes a testcase that was overcommitting large register tuples to a bundle, which the register allocator could not possibly satisfy. This was producing a bundle which used nearly all of the available SGPRs with a series of 16-dword loads (not all of which are freely available to use). This is a quick hack for some deeper issues with how the clause bundler tracks register pressure. Overall the pressure tracking used here doesn't make sense and is too imprecise for what it needs to avoid the allocator failing. The pressure estimate does not account for the alignment requirements of large SGPR tuples, so this was really underestimating the pressure impact. This also ignores the impact of the extended live range of the use registers after the bundle is introduced. Additionally, it didn't account for some wide tuples not being available due to reserved registers. This regresses a few cases. These end up introducing more spilling. This is also a function of the global pressure being used in the decision to bundle, not the local pressure impact of the bundle itself.
Diffstat (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp')
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