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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-05-07 15:46:15 +0200 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2024-05-07 16:06:51 +0200 |
| commit | f548c4d83cdded0c19ca02ca9c071d8ced9ea4fd (patch) | |
| tree | 8ca732ad5a5812d23bbdab52b80e58ec425c9799 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 9eb91f45fb34353942b8f8154f229150a0d01456 (diff) | |
| download | llvm-f548c4d83cdded0c19ca02ca9c071d8ced9ea4fd.zip llvm-f548c4d83cdded0c19ca02ca9c071d8ced9ea4fd.tar.gz llvm-f548c4d83cdded0c19ca02ca9c071d8ced9ea4fd.tar.bz2 | |
AMDGPU: Add mode register use to s_getreg_b32
This should fix reading the wrong mode after setting the mode.
Ideally we would have separate pseudos for the case that we know
does not read mode.
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions