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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-12 17:06:35 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-12 17:06:35 +0000 |
| commit | d9b77848f2ab854d187dff05449982201c9c6221 (patch) | |
| tree | 97a78b184ecf85a6dc583748935c1122a928687d /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 9d13a18845fdff07c935fbfeecaa66f37fcd15f3 (diff) | |
| download | llvm-d9b77848f2ab854d187dff05449982201c9c6221.zip llvm-d9b77848f2ab854d187dff05449982201c9c6221.tar.gz llvm-d9b77848f2ab854d187dff05449982201c9c6221.tar.bz2 | |
AMDGPU: Teach isLegalAddressingMode about flat offsets
Also fix reporting r+r as a valid addressing mode without
offsets.
llvm-svn: 305203
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions