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| author | Petar Avramovic <Petar.Avramovic@amd.com> | 2021-04-28 13:11:44 +0200 |
|---|---|---|
| committer | Petar Avramovic <Petar.Avramovic@amd.com> | 2021-04-29 20:56:03 +0200 |
| commit | c34900e1335d490bf6f16fba55eacd4ecf831f72 (patch) | |
| tree | dc2f5e133bf6c47aea5e0c4bf0f1cdfe70b30007 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 2d42b2ee7bafe76d6b2c792b73f7371cb1cf8d94 (diff) | |
| download | llvm-c34900e1335d490bf6f16fba55eacd4ecf831f72.zip llvm-c34900e1335d490bf6f16fba55eacd4ecf831f72.tar.gz llvm-c34900e1335d490bf6f16fba55eacd4ecf831f72.tar.bz2 | |
AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return
When atomic image intrinsic return value is unused, register class for
destination of a sub-register copy of return value ends up not being set.
This copy then hits 'Register class not set' assert later.
If return value has uses, register class is determined by use instruction.
Fix is to not create sub-register copy when image intrinsic destination has
no uses because it would be deleted by dead-mi-elimination later anyway.
Differential Revision: https://reviews.llvm.org/D101448
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions