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| author | Kazushi (Jam) Marukawa <marukawa@nec.com> | 2020-12-07 20:44:05 +0900 |
|---|---|---|
| committer | Kazushi (Jam) Marukawa <marukawa@nec.com> | 2020-12-15 01:34:31 +0900 |
| commit | aefedb170734d680516c3875873c80fc29498b43 (patch) | |
| tree | fac9dc8b4ab8ba02fdb8301f473f62e90b650e97 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 5f5a2547c174cf1eaf7874ff02c198629fe02c22 (diff) | |
| download | llvm-aefedb170734d680516c3875873c80fc29498b43.zip llvm-aefedb170734d680516c3875873c80fc29498b43.tar.gz llvm-aefedb170734d680516c3875873c80fc29498b43.tar.bz2 | |
[VE] Add logical mask intrinsic instructions
Add andm, orm, xorm, eqvm, nndm, negm, pcvm, lzvm, and tovm intrinsic
instructions, a few pseudo instructions to expand logical intrinsic
using VM512, a mechnism to expand such pseudo instructions, and
regression tests. Also, assign vector mask types and vector mask
register classes correctly. This is required to use VM512 registers
as function arguments.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D93093
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions