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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-01 21:40:54 +0000 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-01 21:40:54 +0000 |
commit | 85c6f7f7a79f2c18a9f92ff43aa5eb83c4b359bb (patch) | |
tree | c76834b09b2b647600d017b7b05eb8dfb8ffb9f9 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
parent | 8918b4b4a2544eb830c29ac91429765ba2e2da20 (diff) | |
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[PowerPC] Support all condition register logical instructions
This adds support for all missing condition register logical
instructions and extended mnemonics to the asm parser.
llvm-svn: 185387
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions