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| author | Marco Vanotti <mvanotti@google.com> | 2021-02-17 13:42:40 -0800 |
|---|---|---|
| committer | Marco Vanotti <mvanotti@google.com> | 2021-02-17 17:42:19 -0800 |
| commit | 78eabcaa48df72e01b352b4b5077cece0693950c (patch) | |
| tree | a597d3bce9a1e5387fe299fc38fa7d3cb9622fc3 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 2628e9146120507b2cf025f5c4ccc857cc3724c4 (diff) | |
| download | llvm-78eabcaa48df72e01b352b4b5077cece0693950c.zip llvm-78eabcaa48df72e01b352b4b5077cece0693950c.tar.gz llvm-78eabcaa48df72e01b352b4b5077cece0693950c.tar.bz2 | |
[libunwind] Add support for PC reg column in arm64
This change adds support for the dwarf PC register column in arm64, allowing
CFI directives to make use of it.
As of the last revision of the DWARF for ARM 64-bit architecture[0], the pc
register has been added as a valir register, with number 32.
This allows libunwinder to restore both pc and lr, which is useful
for stack switches and signal contexts.
[0]:
https://github.com/ARM-software/abi-aa/blob/f52e1ad3f81254497a83578dc102f6aac89e52d0/aadwarf64/aadwarf64.rst
Reviewed By: phosek, #libunwind
Differential Revision: https://reviews.llvm.org/D96901
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions