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| author | Artem Belevich <tra@google.com> | 2023-09-22 13:05:39 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-09-22 13:05:39 -0700 |
| commit | 648579006234b7608549cf708c07aac4d6283a1f (patch) | |
| tree | 069319003d8b314b48caadca46085ccaef0bb7cc /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 64d1ceaa3884608c97f8457de6ab64a038ea49d8 (diff) | |
| download | llvm-648579006234b7608549cf708c07aac4d6283a1f.zip llvm-648579006234b7608549cf708c07aac4d6283a1f.tar.gz llvm-648579006234b7608549cf708c07aac4d6283a1f.tar.bz2 | |
[NVPTX] Improve lowering of v2i16 logical ops. (#67073)
Bitwise logical ops can always be done as b32, regardless of
availability of other v2i16 ops, that would need a new GPU.
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions