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| author | QingShan Zhang <qshanz@cn.ibm.com> | 2020-04-17 05:24:00 +0000 |
|---|---|---|
| committer | QingShan Zhang <qshanz@cn.ibm.com> | 2020-04-17 05:24:00 +0000 |
| commit | 4bd186c0ff76063de9de5507e1e512f7ab4372f1 (patch) | |
| tree | dab27bb4188b880143a1677d15b025bfd01cd25c /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 5034df860038822e640234fde994783c3f26d6f6 (diff) | |
| download | llvm-4bd186c0ff76063de9de5507e1e512f7ab4372f1.zip llvm-4bd186c0ff76063de9de5507e1e512f7ab4372f1.tar.gz llvm-4bd186c0ff76063de9de5507e1e512f7ab4372f1.tar.bz2 | |
[PowerPC] Exploit the rldicl + rldicl when and with mask
If we are and the constant like 0xFFFFFFC00000, for now, we are using several
instructions to generate this 48bit constant and final an "and". However, we
could exploit it with two rotate instructions.
MB ME MB+63-ME
+----------------------+ +----------------------+
|0000001111111111111000| -> |0000000001111111111111|
+----------------------+ +----------------------+
0 63 0 63
Rotate left ME + 1 bit first, and then, mask it with (MB + 63 - ME, 63),
finally, rotate back. Notice that, we need to round it with 64 bit for the
wrapping case.
Reviewed by: ChenZheng, Nemanjai
Differential Revision: https://reviews.llvm.org/D71831
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions