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| author | Yaxun (Sam) Liu <yaxun.liu@amd.com> | 2023-12-01 16:24:01 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-01 16:24:01 -0500 |
| commit | 2b76e20ea782790a78ec58d5f94ce88a173bab7f (patch) | |
| tree | 09e1439adf132e88e939c19b885af116b98e46cf /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | a4d85490e029e797d22881b37d476c2050d0d6a2 (diff) | |
| download | llvm-2b76e20ea782790a78ec58d5f94ce88a173bab7f.zip llvm-2b76e20ea782790a78ec58d5f94ce88a173bab7f.tar.gz llvm-2b76e20ea782790a78ec58d5f94ce88a173bab7f.tar.bz2 | |
[CUDA][HIP] allow trivial ctor/dtor in device var init (#73140)
Treat ctor/dtor in device var init as host device function
so that they can be used to initialize file-scope
device variables to match nvcc behavior. If they are non-trivial
they will be diagnosed.
We cannot add implicit host device attrs to non-trivial
ctor/dtor since determining whether they are non-trivial
needs to know whether they have a trivial body and all their
member and base classes' ctor/dtor have trivial body, which
is affected by where their bodies are defined or instantiated.
Fixes: #72261
Fixes: SWDEV-432412
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions