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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-01 20:31:44 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-01 20:31:44 +0000 |
| commit | 263c6af8f3ce7bc8d1e522dbcea5962c22325839 (patch) | |
| tree | 9b1e41ddea062dbc56bc8a991005b62dfc2e968b /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 7e346a81272224048620c7a8b06f9cdb69ae5f7d (diff) | |
| download | llvm-263c6af8f3ce7bc8d1e522dbcea5962c22325839.zip llvm-263c6af8f3ce7bc8d1e522dbcea5962c22325839.tar.gz llvm-263c6af8f3ce7bc8d1e522dbcea5962c22325839.tar.bz2 | |
[mips] Increase the number of floating point control registers available to 32.
Create a dedicated register class for floating point condition code registers and
move FCC0 from register class CCR to the new register class.
llvm-svn: 185373
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions