diff options
| author | Youling Tang <tangyouling@loongson.cn> | 2022-11-10 13:34:19 +0800 |
|---|---|---|
| committer | Weining Lu <luweining@loongson.cn> | 2022-11-10 13:34:22 +0800 |
| commit | 14cd113e69935e2de9c4d300c3ab01cf83c5d4db (patch) | |
| tree | ceab3260871e7088c77f2ad0bb55728df75ee1ce /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | eae8d93dc26837c2aa5764b7761e4d475b154081 (diff) | |
| download | llvm-14cd113e69935e2de9c4d300c3ab01cf83c5d4db.zip llvm-14cd113e69935e2de9c4d300c3ab01cf83c5d4db.tar.gz llvm-14cd113e69935e2de9c4d300c3ab01cf83c5d4db.tar.bz2 | |
[sanitizer] Add the settings of Read and Write flags in SignalContext for LoongArch
The bit-30 in this `__flags` means the address error is due to memory load, and the
bit-31 means the address error is due to memory store. (see SC_ADDRERR_RD
and SC_ADDRERR_WR in kernel arch/loongarch/include/uapi/asm/sigcontext.h).
`illegal_write_test.cpp` and `illegal_read_test.cpp` have been tested and passed.
Reviewed By: SixWeining, xen0n, XiaodongLoong
Differential Revision: https://reviews.llvm.org/D137231
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions