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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-01-09 17:21:30 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-01-09 17:21:30 +0000 |
| commit | 1440bb2a26ff13df1b29762658ee122cc0bc47ae (patch) | |
| tree | bd1540702f4a6f77010173a9988b1ab2f9ec389a /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 2ce8169ed3c8f49c3ae02c1fd10a684265c1dfcf (diff) | |
| download | llvm-1440bb2a26ff13df1b29762658ee122cc0bc47ae.zip llvm-1440bb2a26ff13df1b29762658ee122cc0bc47ae.tar.gz llvm-1440bb2a26ff13df1b29762658ee122cc0bc47ae.tar.bz2 | |
[mips] Add support for accessing $gp as a named register.
Summary:
Mips Linux uses $gp to hold a pointer to thread info structure and accesses it
with a named register. This makes this work for LLVM.
The N32 ABI doesn't quite work yet since the frontend generates incorrect IR
for this case. It neglects to truncate the 64-bit GPR to a 32-bit value before
converting to a pointer. Given correct IR (as in the testcase in this patch),
it works correctly.
Reviewers: sstankovic, vmedic, atanasyan
Reviewed By: atanasyan
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6893
llvm-svn: 225529
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions