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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-04-26 16:53:15 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-04-26 16:53:15 +0000
commit136ac22eaaeea8fd5db85b7633c3d78bdc0ae46a (patch)
tree62d15a8e3287d5964f2829da44a4fb4f58394bce /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
parent74aeef50a0cc0547f387a38d32b77a2592ccc823 (diff)
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PowerPC: Use RegisterOperand instead of RegisterClass operands
In the default PowerPC assembler syntax, registers are specified simply by number, so they cannot be distinguished from immediate values (without looking at the opcode). This means that the default operand matching logic for the asm parser does not work, and we need to specify custom matchers. Since those can only be specified with RegisterOperand classes and not directly on the RegisterClass, all instructions patterns used by the asm parser need to use a RegisterOperand (instead of a RegisterClass) for all their register operands. This patch adds one RegisterOperand for each RegisterClass, using the same name as the class, just in lower case, and updates all instruction patterns to use RegisterOperand instead of RegisterClass operands. llvm-svn: 180611
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