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author | Hal Finkel <hfinkel@anl.gov> | 2015-03-11 19:14:15 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2015-03-11 19:14:15 +0000 |
commit | 0d0a1a53e3870d1c816bec193841e9d2db1a1b68 (patch) | |
tree | 4e702e29d48a2ea73a594c01ca2c9e4bda6e0f86 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
parent | 8cda34f5e7e6af23910e62ab3edb430dab07799f (diff) | |
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[PowerPC] ABI support for the QPX vector instruction set
Support for the QPX vector instruction set, used on the IBM BG/Q supercomputer,
has recently been added to the LLVM PowerPC backend. This vector instruction
set requires some ABI modifications because the ABI on the BG/Q expects
<4 x double> vectors to be provided with 32-byte stack alignment, and to be
handled as native vector types (similar to how Altivec vectors are handled on
mainline PPC systems). I've named this ABI variant elfv1-qpx, have made this
the default ABI when QPX is supported, and have updated the ABI handling code
to provide QPX vectors with the correct stack alignment and associated
register-assignment logic.
llvm-svn: 231960
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions