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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-05-26 22:08:31 -0400 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-05-27 13:27:06 -0400 |
| commit | 07cd19efa2a63b01aea9b516a7a003cb7f750a12 (patch) | |
| tree | 887e3de44d610183d748a5227c9bd90f20f11f29 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 74a51753a6c2c587f650174e19f99279e8e4ef35 (diff) | |
| download | llvm-07cd19efa2a63b01aea9b516a7a003cb7f750a12.zip llvm-07cd19efa2a63b01aea9b516a7a003cb7f750a12.tar.gz llvm-07cd19efa2a63b01aea9b516a7a003cb7f750a12.tar.bz2 | |
AMDGPU: Fix dropping MI flags when rewriting instructions
All 3 passes that change instruction encodings were dropping MI
flags. This avoids scheduling regressions caused by setting
mayRaiseFPExceptions on FP instructions for non-strictfp functions.
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions