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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-12 17:19:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-12 17:19:20 +0000 |
| commit | 05c26472fa30f80f354935ccc2c3b1a6d76ddb3f (patch) | |
| tree | 1cdda2fa885b969b834dec7f87548f5bb806aa58 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 06c9dc3d9c40160131ad463660d34323b5402012 (diff) | |
| download | llvm-05c26472fa30f80f354935ccc2c3b1a6d76ddb3f.zip llvm-05c26472fa30f80f354935ccc2c3b1a6d76ddb3f.tar.gz llvm-05c26472fa30f80f354935ccc2c3b1a6d76ddb3f.tar.bz2 | |
AMDGPU: Don't add same implicit use multiple times
For the last component, the same register use
was added as an implicit use and another implicit kill use.
llvm-svn: 305205
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions