diff options
author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-17 18:36:25 +0000 |
---|---|---|
committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-17 18:36:25 +0000 |
commit | db7c07e2bf912d8aa604697c26eac2f67624d57a (patch) | |
tree | 97cdc0121eec5f1a7c4e37249e0f1ec7fe0427a3 /llvm/lib/CodeGen/TargetLoweringBase.cpp | |
parent | 2daf3a27c4b00ba4adb6a3629d4d1ac59b0716d1 (diff) | |
download | llvm-db7c07e2bf912d8aa604697c26eac2f67624d57a.zip llvm-db7c07e2bf912d8aa604697c26eac2f67624d57a.tar.gz llvm-db7c07e2bf912d8aa604697c26eac2f67624d57a.tar.bz2 |
Add support to promote f16 to f32
Summary:
This patch adds legalization support to operate on FP16 as a load/store type
and do operations on it as floats.
Tests for ARM are added to test/CodeGen/ARM/fp16-promote.ll
Reviewers: srhines, t.p.northover
Differential Revision: http://reviews.llvm.org/D8755
llvm-svn: 235215
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index 2162a51..8eb6464 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1256,10 +1256,19 @@ void TargetLoweringBase::computeRegisterProperties( } if (!isTypeLegal(MVT::f16)) { - NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::i16]; - RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::i16]; - TransformToType[MVT::f16] = MVT::i16; - ValueTypeActions.setTypeAction(MVT::f16, TypeSoftenFloat); + // If the target has native f32 support, promote f16 operations to f32. If + // f32 is not supported, generate soft float library calls. + if (isTypeLegal(MVT::f32)) { + NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::f32]; + RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::f32]; + TransformToType[MVT::f16] = MVT::f32; + ValueTypeActions.setTypeAction(MVT::f16, TypePromoteFloat); + } else { + NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::i16]; + RegisterTypeForVT[MVT::f16] = RegisterTypeForVT[MVT::i16]; + TransformToType[MVT::f16] = MVT::i16; + ValueTypeActions.setTypeAction(MVT::f16, TypeSoftenFloat); + } } // Loop over all of the vector value types to see which need transformations. |