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| author | Graham Hunter <graham.hunter@arm.com> | 2024-03-20 10:13:20 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-20 10:13:20 +0000 |
| commit | cd768ec9837afed4d226a5abc8035a1559c18bc5 (patch) | |
| tree | 35ea7cb6716a273aed18802b612e8ff0f79422cd /llvm/lib/CodeGen/TargetLoweringBase.cpp | |
| parent | fe1341248d7dd9abd0545ddb48373756645c3f9f (diff) | |
| download | llvm-cd768ec9837afed4d226a5abc8035a1559c18bc5.zip llvm-cd768ec9837afed4d226a5abc8035a1559c18bc5.tar.gz llvm-cd768ec9837afed4d226a5abc8035a1559c18bc5.tar.bz2 | |
[AArch64] Support scalable offsets with isLegalAddressingMode (#83255)
Allows us to indicate that an addressing mode featuring a
vscale-relative immediate offset is supported.
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index 8ac55ee..9990556 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -2011,6 +2011,10 @@ bool TargetLoweringBase::isLegalAddressingMode(const DataLayout &DL, // The default implementation of this implements a conservative RISCy, r+r and // r+i addr mode. + // Scalable offsets not supported + if (AM.ScalableOffset) + return false; + // Allows a sign-extended 16-bit immediate field. if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) return false; |