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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
| commit | bd7d80a4a6b70bf303fd9344d3e70bbe1420062a (patch) | |
| tree | 1aa6a8e53ce6145eb05260d2c74335ac3c244dd2 /llvm/lib/CodeGen/TargetLoweringBase.cpp | |
| parent | 0dba2b399e1cd331f70002f6b922e45bda2b5c2c (diff) | |
| download | llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.zip llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.tar.gz llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.tar.bz2 | |
Add address space argument to isLegalAddressingMode
This is important because of different addressing modes
depending on the address space for GPU targets.
This only adds the argument, and does not update
any of the uses to provide the correct address space.
llvm-svn: 238723
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index b7f1db6..1bc89aa 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1632,7 +1632,8 @@ TargetLoweringBase::getTypeLegalizationCost(Type *Ty) const { /// isLegalAddressingMode - Return true if the addressing mode represented /// by AM is legal for this target, for a load/store of the specified type. bool TargetLoweringBase::isLegalAddressingMode(const AddrMode &AM, - Type *Ty) const { + Type *Ty, + unsigned AS) const { // The default implementation of this implements a conservative RISCy, r+r and // r+i addr mode. |