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| author | Sanjay Patel <spatel@rotateright.com> | 2021-12-17 10:58:48 -0500 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2021-12-17 16:01:37 -0500 |
| commit | 79932211f9126b56bf6cf3ae82c7581d55d91ae2 (patch) | |
| tree | 7f3541a72c07929cd9c9e9df308bc73a7aa9bfb4 /llvm/lib/CodeGen/TargetLoweringBase.cpp | |
| parent | 2d4f3ed5517a52d9eaab82fee7d937f91b4b884c (diff) | |
| download | llvm-79932211f9126b56bf6cf3ae82c7581d55d91ae2.zip llvm-79932211f9126b56bf6cf3ae82c7581d55d91ae2.tar.gz llvm-79932211f9126b56bf6cf3ae82c7581d55d91ae2.tar.bz2 | |
[SDAG] remove FP-to-int cast attribute check in fold to FTRUNC
We were using a function attribute to indicate a non-standard FP mode,
but now we can use intrinsics for that job as shown in the new tests.
Presumably the x86 asm could be improved for that IR with intrinsics,
but I have not worked out exactly how to do that. Note that the
transform to FTRUNC still requires a hacky check for "nsz" (because
FMF are not applied to FP casts).
This is a cleanup based on the clang change in D115804 / 8c7f2a4f87192 .
This is effectively a revert of 5a90285bd98d2 + D46237 .
Differential Revision: https://reviews.llvm.org/D115885
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
0 files changed, 0 insertions, 0 deletions