aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/TargetLoweringBase.cpp
diff options
context:
space:
mode:
authorWang, Pengfei <pengfei.wang@intel.com>2021-08-18 09:03:01 +0800
committerWang, Pengfei <pengfei.wang@intel.com>2021-08-18 09:03:41 +0800
commit2379949aadcee8d4028dec0508f88bda290636bc (patch)
tree01274b48d20e669f1264af926aa17700366e360b /llvm/lib/CodeGen/TargetLoweringBase.cpp
parent94d091429253e46e4cdd31a30e4d1b25b2879d6a (diff)
downloadllvm-2379949aadcee8d4028dec0508f88bda290636bc.zip
llvm-2379949aadcee8d4028dec0508f88bda290636bc.tar.gz
llvm-2379949aadcee8d4028dec0508f88bda290636bc.tar.bz2
[X86] AVX512FP16 instructions enabling 3/6
Enable FP16 conversion instructions. Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D105265
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetLoweringBase.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 74946c0..201697c 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -237,6 +237,8 @@ RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
return FPEXT_F16_F32;
if (RetVT == MVT::f64)
return FPEXT_F16_F64;
+ if (RetVT == MVT::f80)
+ return FPEXT_F16_F80;
if (RetVT == MVT::f128)
return FPEXT_F16_F128;
} else if (OpVT == MVT::f32) {