[DAGCombiner][TLI] Do not fuse bitcast to <1 x ?> into a load/store of a vector

Single-element vectors are legalized by splitting,
so the the memory operations would also get scalarized.
While we do have some support to reconstruct scalarized loads,
we clearly don't catch everything.

The comment for the affected AArch64 store suggests that
having two stores was the desired outcome in the first place.

This was showing as a source of *many* regressions
with more aggressive ZERO_EXTEND_VECTOR_INREG recognition.

1 files changed, 6 insertions, 0 deletions

diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 37eb96e..40302d2 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -2217,6 +2217,12 @@ int TargetLoweringBase::getDivRefinementSteps(EVT VT,
 bool TargetLoweringBase::isLoadBitCastBeneficial(
     EVT LoadVT, EVT BitcastVT, const SelectionDAG &DAG,
     const MachineMemOperand &MMO) const {
+  // Single-element vectors are scalarized, so we should generally avoid having
+  // any memory operations on such types, as they would get scalarized too.
+  if (LoadVT.isFixedLengthVector() && BitcastVT.isFixedLengthVector() &&
+      BitcastVT.getVectorNumElements() == 1)
+    return false;
+
   // Don't do if we could do an indexed load on the original type, but not on
   // the new one.
   if (!LoadVT.isSimple() || !BitcastVT.isSimple())