aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/TargetLoweringBase.cpp
diff options
context:
space:
mode:
authorFarzon Lotfi <1802579+farzonl@users.noreply.github.com>2024-07-11 15:58:43 -0400
committerGitHub <noreply@github.com>2024-07-11 15:58:43 -0400
commit0b58f34c98e4715c3c920820d79e53e8d99c1b59 (patch)
tree0cf7eaad15c450d4eaac97bee766e84cba65d3d3 /llvm/lib/CodeGen/TargetLoweringBase.cpp
parentea4ae2590dea6ab5acf790a6098863d4ba63300f (diff)
downloadllvm-0b58f34c98e4715c3c920820d79e53e8d99c1b59.zip
llvm-0b58f34c98e4715c3c920820d79e53e8d99c1b59.tar.gz
llvm-0b58f34c98e4715c3c920820d79e53e8d99c1b59.tar.bz2
[X86][CodeGen] Add base trig intrinsic lowerings (#96222)
This change is an implementation of https://github.com/llvm/llvm-project/issues/87367's investigation on supporting IEEE math operations as intrinsics. Which was discussed in this RFC: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 This change adds constraint intrinsics and some lowering cases for `acos`, `asin`, `atan`, `cosh`, `sinh`, and `tanh`. The only x86 specific change was for f80. https://github.com/llvm/llvm-project/issues/70079 https://github.com/llvm/llvm-project/issues/70080 https://github.com/llvm/llvm-project/issues/70081 https://github.com/llvm/llvm-project/issues/70083 https://github.com/llvm/llvm-project/issues/70084 https://github.com/llvm/llvm-project/issues/95966 The x86 lowering is going to be done in three pr changes with this being the first. A second PR will be put up for Loop Vectorizing and then SLPVectorizer. The constraint intrinsics is also going to be in multiple parts, but just 2. This part covers just the llvm specific changes, part2 will cover clang specifc changes and legalization for backends than have special legalization requirements like aarch64 and wasm.
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetLoweringBase.cpp24
1 files changed, 17 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 4a2db27..8ea4dbd 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -143,6 +143,12 @@ void TargetLoweringBase::InitLibcalls(const Triple &TT) {
setLibcallName(RTLIB::COS_F128, "cosf128");
setLibcallName(RTLIB::TAN_F128, "tanf128");
setLibcallName(RTLIB::SINCOS_F128, "sincosf128");
+ setLibcallName(RTLIB::ASIN_F128, "asinf128");
+ setLibcallName(RTLIB::ACOS_F128, "acosf128");
+ setLibcallName(RTLIB::ATAN_F128, "atanf128");
+ setLibcallName(RTLIB::SINH_F128, "sinhf128");
+ setLibcallName(RTLIB::COSH_F128, "coshf128");
+ setLibcallName(RTLIB::TANH_F128, "tanhf128");
setLibcallName(RTLIB::POW_F128, "powf128");
setLibcallName(RTLIB::POW_FINITE_F128, "__powf128_finite");
setLibcallName(RTLIB::CEIL_F128, "ceilf128");
@@ -1102,7 +1108,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(
{ISD::FCOPYSIGN, ISD::SIGN_EXTEND_INREG, ISD::ANY_EXTEND_VECTOR_INREG,
ISD::SIGN_EXTEND_VECTOR_INREG, ISD::ZERO_EXTEND_VECTOR_INREG,
- ISD::SPLAT_VECTOR, ISD::LRINT, ISD::LLRINT, ISD::FTAN},
+ ISD::SPLAT_VECTOR, ISD::LRINT, ISD::LLRINT, ISD::FTAN, ISD::FACOS,
+ ISD::FASIN, ISD::FATAN, ISD::FCOSH, ISD::FSINH, ISD::FTANH},
VT, Expand);
// Constrained floating-point operations default to expand.
@@ -1154,14 +1161,17 @@ void TargetLoweringBase::initActions() {
Expand);
// These library functions default to expand.
- setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, ISD::FEXP,
- ISD::FEXP2, ISD::FEXP10, ISD::FFLOOR, ISD::FNEARBYINT,
- ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, ISD::LROUND,
- ISD::LLROUND, ISD::LRINT, ISD::LLRINT, ISD::FROUNDEVEN,
- ISD::FTAN},
+ setOperationAction({ISD::FCBRT, ISD::FLOG, ISD::FLOG2, ISD::FLOG10,
+ ISD::FEXP, ISD::FEXP2, ISD::FEXP10, ISD::FFLOOR,
+ ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC,
+ ISD::LROUND, ISD::LLROUND, ISD::LRINT, ISD::LLRINT,
+ ISD::FROUNDEVEN, ISD::FTAN, ISD::FACOS, ISD::FASIN,
+ ISD::FATAN, ISD::FCOSH, ISD::FSINH, ISD::FTANH},
{MVT::f32, MVT::f64, MVT::f128}, Expand);
- setOperationAction(ISD::FTAN, MVT::f16, Promote);
+ setOperationAction({ISD::FTAN, ISD::FACOS, ISD::FASIN, ISD::FATAN, ISD::FCOSH,
+ ISD::FSINH, ISD::FTANH},
+ MVT::f16, Promote);
// Default ISD::TRAP to expand (which turns it into abort).
setOperationAction(ISD::TRAP, MVT::Other, Expand);