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| author | Krzysztof Drewniak <Krzysztof.Drewniak@amd.com> | 2021-11-17 23:56:35 +0000 |
|---|---|---|
| committer | Krzysztof Drewniak <Krzysztof.Drewniak@amd.com> | 2021-11-18 16:28:44 +0000 |
| commit | fb1a06aa13815c20fe2fdffc520d530e98dfae7a (patch) | |
| tree | 358858161a1c4d840224540f52f1bee6328db02d /llvm/lib/CodeGen/StackProtector.cpp | |
| parent | a3f2be18b8fe440893d9dae260753b6bceb0e1aa (diff) | |
| download | llvm-fb1a06aa13815c20fe2fdffc520d530e98dfae7a.zip llvm-fb1a06aa13815c20fe2fdffc520d530e98dfae7a.tar.gz llvm-fb1a06aa13815c20fe2fdffc520d530e98dfae7a.tar.bz2 | |
[MLIR][GPU] Add target arguments to SerializeToHsaco
Compiling code for AMD GPUs requires knowledge of which chipset is
being targeted, especially if the code uses chipset-specific
intrinsics (which is the case in a downstream convolution generator).
This commit adds `target`, `chipset` and `features` arguments to the
SerializeToHsaco constructor to enable passing in this required
information.
It also amends the ROCm integration tests to pass in the target
chipset, which is set to the chipset of the first GPU on the system
executing the tests.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114107
Diffstat (limited to 'llvm/lib/CodeGen/StackProtector.cpp')
0 files changed, 0 insertions, 0 deletions