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| author | Renato Golin <renato.golin@linaro.org> | 2014-06-10 16:39:21 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2014-06-10 16:39:21 +0000 |
| commit | 65eea557aee10ddf0dc35be069597f34554de308 (patch) | |
| tree | 2f3ff5a82eb50b2ed5ea4ddf89246de197781235 /llvm/lib/CodeGen/StackMaps.cpp | |
| parent | 3787b122552d8dfc1cb965494bf4f1803c6acbc5 (diff) | |
| download | llvm-65eea557aee10ddf0dc35be069597f34554de308.zip llvm-65eea557aee10ddf0dc35be069597f34554de308.tar.gz llvm-65eea557aee10ddf0dc35be069597f34554de308.tar.bz2 | |
Fix a bug in the Thumb1 ARM Load/Store optimizer
Previously, the basic block was searched for future uses of the base register,
and if necessary any writeback to the base register was reset using a SUB
instruction (e.g. before calling a function) just before such a use. However,
this step happened *before* the merged LDM/STM instruction was built. So if
there was (e.g.) a function call directly after the not-yet-formed LDM/STM,
the pass would first insert a SUB instruction to reset the base register,
and then (at the same location, incorrectly) insert the LDM/STM itself.
This patch fixes PR19972. Patch by Moritz Roth.
llvm-svn: 210542
Diffstat (limited to 'llvm/lib/CodeGen/StackMaps.cpp')
0 files changed, 0 insertions, 0 deletions