diff options
author | Craig Topper <craig.topper@sifive.com> | 2025-09-16 10:26:49 -0700 |
---|---|---|
committer | GitHub <noreply@github.com> | 2025-09-16 10:26:49 -0700 |
commit | f209d63b042e3b3455b67ecb08908135dd9d31fe (patch) | |
tree | 321f8b90eeede6ec94faa960cefcdb226e2b7dd3 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 40f2da5c04042dcf6ae8dfc757d31a32da7f329e (diff) | |
download | llvm-f209d63b042e3b3455b67ecb08908135dd9d31fe.zip llvm-f209d63b042e3b3455b67ecb08908135dd9d31fe.tar.gz llvm-f209d63b042e3b3455b67ecb08908135dd9d31fe.tar.bz2 |
[SelectionDAGBuilder][PPC] Use getShiftAmountConstant. (#158400)
The PowerPC changes are caused by shifts created by different IR
operations being CSEd now. This allows consecutive loads to be turned
into vectors earlier. This has effects on the ordering of other combines
and legalizations. This leads to some improvements and some regressions.
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 27 |
1 files changed, 11 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 430e474..299acf6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -223,10 +223,9 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, std::swap(Lo, Hi); EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); - Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, - DAG.getConstant(Lo.getValueSizeInBits(), DL, - TLI.getShiftAmountTy( - TotalVT, DAG.getDataLayout()))); + Hi = DAG.getNode( + ISD::SHL, DL, TotalVT, Hi, + DAG.getShiftAmountConstant(Lo.getValueSizeInBits(), TotalVT, DL)); Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); } @@ -4469,9 +4468,10 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) { if (ElementMul != 1) { if (ElementMul.isPowerOf2()) { unsigned Amt = ElementMul.logBase2(); - IdxN = DAG.getNode(ISD::SHL, dl, N.getValueType(), IdxN, - DAG.getConstant(Amt, dl, IdxN.getValueType()), - ScaleFlags); + IdxN = DAG.getNode( + ISD::SHL, dl, N.getValueType(), IdxN, + DAG.getShiftAmountConstant(Amt, N.getValueType(), dl), + ScaleFlags); } else { SDValue Scale = DAG.getConstant(ElementMul.getZExtValue(), dl, IdxN.getValueType()); @@ -5460,10 +5460,8 @@ static SDValue GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, const SDLoc &dl) { SDValue t0 = DAG.getNode(ISD::AND, dl, MVT::i32, Op, DAG.getConstant(0x7f800000, dl, MVT::i32)); - SDValue t1 = DAG.getNode( - ISD::SRL, dl, MVT::i32, t0, - DAG.getConstant(23, dl, - TLI.getShiftAmountTy(MVT::i32, DAG.getDataLayout()))); + SDValue t1 = DAG.getNode(ISD::SRL, dl, MVT::i32, t0, + DAG.getShiftAmountConstant(23, MVT::i32, dl)); SDValue t2 = DAG.getNode(ISD::SUB, dl, MVT::i32, t1, DAG.getConstant(127, dl, MVT::i32)); return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2); @@ -5488,11 +5486,8 @@ static SDValue getLimitedPrecisionExp2(SDValue t0, const SDLoc &dl, SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1); // IntegerPartOfX <<= 23; - IntegerPartOfX = - DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX, - DAG.getConstant(23, dl, - DAG.getTargetLoweringInfo().getShiftAmountTy( - MVT::i32, DAG.getDataLayout()))); + IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX, + DAG.getShiftAmountConstant(23, MVT::i32, dl)); SDValue TwoToFractionalPartOfX; if (LimitFloatPrecision <= 6) { |