aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
diff options
context:
space:
mode:
authorPierre van Houtryve <pierre.vanhoutryve@amd.com>2025-05-22 11:42:01 +0200
committerGitHub <noreply@github.com>2025-05-22 11:42:01 +0200
commitb5e2a236b9b31243c93d489ccee7b78aacda565a (patch)
tree25a2713a27ee3e49074906986f83080f98eed4be /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
parent4a158f675be7fd1b3763bf39980d801db89744f8 (diff)
downloadllvm-b5e2a236b9b31243c93d489ccee7b78aacda565a.zip
llvm-b5e2a236b9b31243c93d489ccee7b78aacda565a.tar.gz
llvm-b5e2a236b9b31243c93d489ccee7b78aacda565a.tar.bz2
[CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo (#140896)
getTgtMemIntrinsic should be able to propagate such information to the MMO
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index e32fcfe..434484b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5305,9 +5305,16 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
MPI = MachinePointerInfo(Info.ptrVal, Info.offset);
else if (Info.fallbackAddressSpace)
MPI = MachinePointerInfo(*Info.fallbackAddressSpace);
- Result = DAG.getMemIntrinsicNode(
- Info.opc, getCurSDLoc(), VTs, Ops, Info.memVT, MPI, Info.align,
- Info.flags, LocationSize::precise(Info.size), I.getAAMetadata());
+ EVT MemVT = Info.memVT;
+ LocationSize Size = LocationSize::precise(Info.size);
+ if (Size.hasValue() && !Size.getValue())
+ Size = LocationSize::precise(MemVT.getStoreSize());
+ Align Alignment = Info.align.value_or(DAG.getEVTAlign(MemVT));
+ MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
+ MPI, Info.flags, Size, Alignment, I.getAAMetadata(), /*Ranges=*/nullptr,
+ Info.ssid, Info.order, Info.failureOrder);
+ Result =
+ DAG.getMemIntrinsicNode(Info.opc, getCurSDLoc(), VTs, Ops, MemVT, MMO);
} else if (!HasChain) {
Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(), VTs, Ops);
} else if (!I.getType()->isVoidTy()) {