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author | Luke Lau <luke@igalia.com> | 2025-05-26 18:20:07 +0100 |
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committer | Luke Lau <luke@igalia.com> | 2025-05-26 18:21:27 +0100 |
commit | 841c8d48a62dc62bf8a23883225fd88d6848e45c (patch) | |
tree | 6d4af7cca7e4b519d1052fdb68c9d539ea43a533 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 4b09eedf7b95c4e0b073a82ca6a60c033c17f27b (diff) | |
download | llvm-841c8d48a62dc62bf8a23883225fd88d6848e45c.zip llvm-841c8d48a62dc62bf8a23883225fd88d6848e45c.tar.gz llvm-841c8d48a62dc62bf8a23883225fd88d6848e45c.tar.bz2 |
[LV] Add tests for more interleave group factors on AArch64 and RISC-V. NFC
The plan is to eventually add support for scalably vectorizing these for
non-power-of-2 factors, see https://github.com/llvm/llvm-project/pull/139893
Simultaneously, we need to add a test to make sure we don't generate
@llvm.vector.[de]interleave3 for AArch64 if we can't lower it (yet)
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
0 files changed, 0 insertions, 0 deletions