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author | Miguel Saldivar <miguel.saldivar@hpe.com> | 2025-08-26 14:28:02 -0700 |
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committer | GitHub <noreply@github.com> | 2025-08-26 14:28:02 -0700 |
commit | 0a8acd2eb2aff0edd610fc3ec14b32bee446656f (patch) | |
tree | 115f0387e4d24047d5a525ab271232914999c1b0 /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
parent | 2c920a11e3af22f4b999020b084ce677da71888f (diff) | |
download | llvm-0a8acd2eb2aff0edd610fc3ec14b32bee446656f.zip llvm-0a8acd2eb2aff0edd610fc3ec14b32bee446656f.tar.gz llvm-0a8acd2eb2aff0edd610fc3ec14b32bee446656f.tar.bz2 |
[DAG] ComputeNumSignBits - ISD::EXTRACT_ELEMENT needs to return at least 1 (#155455)
When going through the ISD::EXTRACT_ELEMENT case, `KnownSign - rIndex *
BitWidth`
could produce a negative. When a negative is produced, the lower bound
of the `std::clamp` is returned. Change that lower bound to one to avoid
potential underflows, because the expectation is that
`ComputeNumSignBits`
should always return at least 1.
Fixes #155452.
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 3672a91..078825f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5127,7 +5127,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts, // If the sign portion ends in our element the subtraction gives correct // result. Otherwise it gives either negative or > bitwidth result - return std::clamp(KnownSign - rIndex * BitWidth, 0, BitWidth); + return std::clamp(KnownSign - rIndex * BitWidth, 1, BitWidth); } case ISD::INSERT_VECTOR_ELT: { if (VT.isScalableVector()) |