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author | eopXD <yueh.ting.chen@gmail.com> | 2023-03-23 01:51:39 -0700 |
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committer | eopXD <yueh.ting.chen@gmail.com> | 2023-05-19 09:39:36 -0700 |
commit | c8eb535aed0368c20b25fe05bca563ab38dd91e9 (patch) | |
tree | 8a2b1d6e9853b9498c3cfb58cb47afa9d251fec8 /llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | |
parent | dae175423a07fbc63cf9d996751609361493f925 (diff) | |
download | llvm-c8eb535aed0368c20b25fe05bca563ab38dd91e9.zip llvm-c8eb535aed0368c20b25fe05bca563ab38dd91e9.tar.gz llvm-c8eb535aed0368c20b25fe05bca563ab38dd91e9.tar.bz2 |
[1/11][IR] Permit load/store/alloca for struct of the same scalable vector type
This patch-set aims to simplify the existing RVV segment load/store
intrinsics to use a type that represents a tuple of vectors instead.
To achieve this, first we need to relax the current limitation for an
aggregate type to be a target of load/store/alloca when the aggregate
type contains homogeneous scalable vector types. Then to adjust the
prolog of an LLVM function during lowering to clang. Finally we
re-define the RVV segment load/store intrinsics to use the tuple types.
The pull request under the RVV intrinsic specification is
riscv-non-isa/rvv-intrinsic-doc#198
---
This is the 1st patch of the patch-set. This patch is originated from
D98169.
This patch allows aggregate type (StructType) that contains homogeneous
scalable vector types to be a target of load/store/alloca. The RFC of
this patch was posted in LLVM Discourse.
https://discourse.llvm.org/t/rfc-ir-permit-load-store-alloca-for-struct-of-the-same-scalable-vector-type/69527
The main changes in this patch are:
Extend `StructLayout::StructSize` from `uint64_t` to `TypeSize` to
accommodate an expression of scalable size.
Allow `StructType:isSized` to also return true for homogeneous
scalable vector types.
Let `Type::isScalableTy` return true when `Type` is `StructType`
and contains scalable vectors
Extra description is added in the LLVM Language Reference Manual on the
relaxation of this patch.
Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Co-Authored-by: eop Chen <eop.chen@sifive.com>
Reviewed By: craig.topper, nikic
Differential Revision: https://reviews.llvm.org/D146872
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index 1d15dbb..1d0a03c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -152,9 +152,10 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf, false, AI); } - // Scalable vectors may need a special StackID to distinguish - // them from other (fixed size) stack objects. - if (isa<ScalableVectorType>(Ty)) + // Scalable vectors and structures that contain scalable vectors may + // need a special StackID to distinguish them from other (fixed size) + // stack objects. + if (Ty->isScalableTy()) MF->getFrameInfo().setStackID(FrameIndex, TFI->getStackIDForScalableVectors()); |