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| author | Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com> | 2024-02-21 11:07:02 +0530 |
|---|---|---|
| committer | Sameer Sahasrabuddhe <sameer.sahasrabuddhe@amd.com> | 2024-02-21 11:07:02 +0530 |
| commit | a2afcd5721869d1d03c8146bae3885b3385ba15e (patch) | |
| tree | 3e2b0e2e4fafa73c0411a94b89ea87a8fd32bc7a /llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | |
| parent | b8ed69ecc01385c03844e8fa05ba418a5670d322 (diff) | |
| download | llvm-a2afcd5721869d1d03c8146bae3885b3385ba15e.zip llvm-a2afcd5721869d1d03c8146bae3885b3385ba15e.tar.gz llvm-a2afcd5721869d1d03c8146bae3885b3385ba15e.tar.bz2 | |
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
This reverts commit 79889734b940356ab3381423c93ae06f22e772c9.
Encountered multiple buildbot failures.
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index e01cd8c..4172fbc 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -395,16 +395,6 @@ Register FunctionLoweringInfo::CreateRegs(const Value *V) { !TLI->requiresUniformRegister(*MF, V)); } -Register FunctionLoweringInfo::InitializeRegForValue(const Value *V) { - // Tokens live in vregs only when used for convergence control. - if (V->getType()->isTokenTy() && !isa<ConvergenceControlInst>(V)) - return 0; - Register &R = ValueMap[V]; - assert(R == Register() && "Already initialized this value register!"); - assert(VirtReg2Value.empty()); - return R = CreateRegs(V); -} - /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If /// the register's LiveOutInfo is for a smaller bit width, it is extended to |