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author | Ellis Hoag <ellis.sparky.hoag@gmail.com> | 2024-10-21 11:10:50 -0700 |
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committer | GitHub <noreply@github.com> | 2024-10-21 11:10:50 -0700 |
commit | e6ada7162e25ab28f6e588fba23f0c11dd1238b5 (patch) | |
tree | 256943acef9356b34bba910c1ac3945af0833e9f /llvm/lib/CodeGen/RegAllocBasic.cpp | |
parent | f58ce1152703ca753794b8cef36da30bd2668d0f (diff) | |
download | llvm-e6ada7162e25ab28f6e588fba23f0c11dd1238b5.zip llvm-e6ada7162e25ab28f6e588fba23f0c11dd1238b5.tar.gz llvm-e6ada7162e25ab28f6e588fba23f0c11dd1238b5.tar.bz2 |
[regalloc][basic] Change spill weight for optsize funcs (#112960)
Change the spill weight calculations for `optsize` functions to remove
the block frequency multiplier. For those functions, we do not want to
consider the runtime cost of spilling, only the codesize cost.
I built a large app with the basic and greedy (default) register
allocator enabled.
| Regalloc Type | Uncompressed Size Delta | Compressed Size Delta |
| - | - | - |
| Basic | -303.8 KiB (-0.23%) | -232.0 KiB (-0.39%) |
| Greedy | 159.1 KiB (0.12%) | 130.1 KiB (0.22%) |
Since I only saw a size win with the basic register allocator, I decided
to only change the behavior for that type.
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBasic.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocBasic.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index caf9c32..046784c 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -14,6 +14,7 @@ #include "AllocationOrder.h" #include "RegAllocBase.h" #include "llvm/Analysis/AliasAnalysis.h" +#include "llvm/Analysis/ProfileSummaryInfo.h" #include "llvm/CodeGen/CalcSpillWeights.h" #include "llvm/CodeGen/LiveDebugVariables.h" #include "llvm/CodeGen/LiveIntervals.h" @@ -140,6 +141,7 @@ INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) INITIALIZE_PASS_DEPENDENCY(VirtRegMap) INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix) +INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass) INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false, false) @@ -182,6 +184,7 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<LiveDebugVariables>(); AU.addRequired<LiveStacks>(); AU.addPreserved<LiveStacks>(); + AU.addRequired<ProfileSummaryInfoWrapperPass>(); AU.addRequired<MachineBlockFrequencyInfoWrapperPass>(); AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>(); AU.addRequiredID(MachineDominatorsID); @@ -312,7 +315,8 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { getAnalysis<LiveRegMatrix>()); VirtRegAuxInfo VRAI( *MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(), - getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()); + getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(), + &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI()); VRAI.calculateSpillWeightsAndHints(); SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM, VRAI)); |