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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-12-16 16:57:13 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-16 14:57:13 +0700 |
| commit | a3db5910b434d746c9c0585a092100ff7abcd1a0 (patch) | |
| tree | c62f583413b52a3d033d99684c0d84b8de7dde34 /llvm/lib/CodeGen/RegAllocBase.cpp | |
| parent | f65a21a4ecc2e712c700c59842b6b9a1d2a9a060 (diff) | |
| download | llvm-a3db5910b434d746c9c0585a092100ff7abcd1a0.zip llvm-a3db5910b434d746c9c0585a092100ff7abcd1a0.tar.gz llvm-a3db5910b434d746c9c0585a092100ff7abcd1a0.tar.bz2 | |
RegAllocBase: Avoid using temporary DiagnosticInfo (#120046)
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocBase.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp index 980a675..50addcb 100644 --- a/llvm/lib/CodeGen/RegAllocBase.cpp +++ b/llvm/lib/CodeGen/RegAllocBase.cpp @@ -200,10 +200,9 @@ MCPhysReg RegAllocBase::getErrorAssignment(const TargetRegisterClass &RC, ArrayRef<MCPhysReg> RawRegs = RC.getRegisters(); if (EmitError) { - DiagnosticInfoRegAllocFailure DI( + Context.diagnose(DiagnosticInfoRegAllocFailure( "no registers from class available to allocate", Fn, - CtxMI ? CtxMI->getDebugLoc() : DiagnosticLocation()); - Context.diagnose(DI); + CtxMI ? CtxMI->getDebugLoc() : DiagnosticLocation())); } assert(!RawRegs.empty() && "register classes cannot have no registers"); @@ -215,10 +214,9 @@ MCPhysReg RegAllocBase::getErrorAssignment(const TargetRegisterClass &RC, CtxMI->emitInlineAsmError( "inline assembly requires more registers than available"); } else { - DiagnosticInfoRegAllocFailure DI( + Context.diagnose(DiagnosticInfoRegAllocFailure( "ran out of registers during register allocation", Fn, - CtxMI ? CtxMI->getDebugLoc() : DiagnosticLocation()); - Context.diagnose(DI); + CtxMI ? CtxMI->getDebugLoc() : DiagnosticLocation())); } } |