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authorMatt Arsenault <Matthew.Arsenault@amd.com>2025-02-22 00:21:45 +0700
committerMatt Arsenault <arsenm2@gmail.com>2025-02-22 00:23:21 +0700
commit0c50054820799578be8f62b6fd2cc3fbc751c01e (patch)
tree358a7dc2f710195019d3095c33cc8153a280453d /llvm/lib/CodeGen/RegAllocBase.cpp
parent7c7fb9442f9f3ca1cf302ca2ff2906de7452a846 (diff)
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Revert "RegAlloc: Fix verifier error after failed allocation (#119690)"
This reverts commit 34167f99668ce4d4d6a1fb88453a8d5b56d16ed5. Different set of verifier errors appears after other regalloc failure tests with EXPENSIVE_CHECKS.
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocBase.cpp36
1 files changed, 0 insertions, 36 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index 123d5cd..50addcb 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -65,7 +65,6 @@ void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis,
Matrix = &mat;
MRI->freezeReservedRegs();
RegClassInfo.runOnMachineFunction(vrm.getMachineFunction());
- FailedVRegs.clear();
}
// Visit all the live registers. If they are already assigned to a physical
@@ -129,7 +128,6 @@ void RegAllocBase::allocatePhysRegs() {
// Keep going after reporting the error.
VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,40 +161,6 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet<Register, 8> JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
- JunkRegs.insert(FailedReg);
-
- MCRegister PhysReg = VRM->getPhys(FailedReg);
- LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
- // The liveness information for the failed register and anything interfering
- // with the physical register we arbitrarily chose is junk and needs to be
- // deleted.
- for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
- JunkRegs.insert(InterferingReg->reg());
- }
- }
-
- // TODO: Probably need to set undef on any physreg uses not associated with
- // a virtual register.
- for (Register JunkReg : JunkRegs) {
- // We still should produce valid IR. Kill all the uses and reduce the live
- // ranges so that we don't think it's possible to introduce kill flags
- // later which will fail the verifier.
- for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
- MO.setIsUndef(true);
- }
-
- LIS->shrinkToUses(&LIS->getInterval(JunkReg));
- }
-}
-
void RegAllocBase::enqueue(const LiveInterval *LI) {
const Register Reg = LI->reg();