aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff options
context:
space:
mode:
authorDavid Blaikie <dblaikie@gmail.com>2013-06-16 20:34:15 +0000
committerDavid Blaikie <dblaikie@gmail.com>2013-06-16 20:34:15 +0000
commit0252265be09bcd94c72cea95e21a773b3ea1c638 (patch)
tree8a36a32a3f4d9d42ada095959fcf6cdc2ebc598d /llvm/lib/CodeGen/PrologEpilogInserter.cpp
parent80d055494973e23dda00914c8f214e289831a341 (diff)
downloadllvm-0252265be09bcd94c72cea95e21a773b3ea1c638.zip
llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.tar.gz
llvm-0252265be09bcd94c72cea95e21a773b3ea1c638.tar.bz2
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This reduces the complexity of debug info handling down to two representations of values (reg+offset and frame index+offset) rather than three or four. Ideally we could ensure that frame indicies had been eliminated by the time we reached an assembly or dwarf generation, but I haven't spent the time to figure out where the FIs are leaking through into that & whether there's a good place to convert them. Some FI+offset=>reg+offset conversion is done (see PrologEpilogInserter, for example) which is necessary for some SelectionDAG assumptions about registers, I believe, but it might be possible to make this a more thorough conversion & ensure there are no remaining FIs no matter how instruction selection is performed. llvm-svn: 184066
Diffstat (limited to 'llvm/lib/CodeGen/PrologEpilogInserter.cpp')
-rw-r--r--llvm/lib/CodeGen/PrologEpilogInserter.cpp17
1 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 9f2cba2..47eb23f 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -777,7 +777,22 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
bool DoIncr = true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
if (!MI->getOperand(i).isFI())
- continue;
+ continue;
+
+ // Frame indicies in debug values are encoded in a target independent
+ // way with simply the frame index and offset rather than any
+ // target-specific addressing mode.
+ if (MI->isDebugValue()) {
+ assert(i == 0 && "Frame indicies can only appear as the first "
+ "operand of a DBG_VALUE machine instruction");
+ unsigned Reg;
+ MachineOperand &Offset = MI->getOperand(1);
+ Offset.setImm(Offset.getImm() +
+ TFI->getFrameIndexReference(
+ Fn, MI->getOperand(0).getIndex(), Reg));
+ MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
+ continue;
+ }
// Some instructions (e.g. inline asm instructions) can have
// multiple frame indices and/or cause eliminateFrameIndex