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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-04-22 17:43:53 -0400 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-04-22 18:28:45 -0400 |
| commit | 6fa1d12b3ca7665cf5cc20682ccd5d62a00b58ed (patch) | |
| tree | b59aace93e9872a61568836a48774dc6efa4dce7 /llvm/lib/CodeGen/ProcessImplicitDefs.cpp | |
| parent | 8ed2bd1e746567ab82e138896db340a6a6781511 (diff) | |
| download | llvm-6fa1d12b3ca7665cf5cc20682ccd5d62a00b58ed.zip llvm-6fa1d12b3ca7665cf5cc20682ccd5d62a00b58ed.tar.gz llvm-6fa1d12b3ca7665cf5cc20682ccd5d62a00b58ed.tar.bz2 | |
ProcessImplicitDefs: Use required properties instead of isSSA assert
Diffstat (limited to 'llvm/lib/CodeGen/ProcessImplicitDefs.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/ProcessImplicitDefs.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp index 117ee59a..7327f9e 100644 --- a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp +++ b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp @@ -46,6 +46,11 @@ public: void getAnalysisUsage(AnalysisUsage &au) const override; bool runOnMachineFunction(MachineFunction &MF) override; + + virtual MachineFunctionProperties getRequiredProperties() const override { + return MachineFunctionProperties().set( + MachineFunctionProperties::Property::IsSSA); + } }; } // end anonymous namespace @@ -141,7 +146,6 @@ bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) { TII = MF.getSubtarget().getInstrInfo(); TRI = MF.getSubtarget().getRegisterInfo(); MRI = &MF.getRegInfo(); - assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form."); assert(WorkList.empty() && "Inconsistent worklist state"); for (MachineBasicBlock &MBB : MF) { |