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| author | Evan Cheng <evan.cheng@apple.com> | 2010-09-10 01:29:16 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-09-10 01:29:16 +0000 |
| commit | bf4070756f4acbae9a556c56003f0dd71521288e (patch) | |
| tree | 73c9f913ec61f913b9eff7f8f6cd745bc94cb2ad /llvm/lib/CodeGen/PostRASchedulerList.cpp | |
| parent | 516484c71e6322a3d17ce91c7107afefb35e972f (diff) | |
| download | llvm-bf4070756f4acbae9a556c56003f0dd71521288e.zip llvm-bf4070756f4acbae9a556c56003f0dd71521288e.tar.gz llvm-bf4070756f4acbae9a556c56003f0dd71521288e.tar.bz2 | |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
llvm-svn: 113570
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/PostRASchedulerList.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp index f0bd6d1..bd5b2b8 100644 --- a/llvm/lib/CodeGen/PostRASchedulerList.cpp +++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp @@ -213,7 +213,7 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) { const MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); const MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>(); const TargetMachine &TM = Fn.getTarget(); - const InstrItineraryData &InstrItins = TM.getInstrItineraryData(); + const InstrItineraryData *InstrItins = TM.getInstrItineraryData(); ScheduleHazardRecognizer *HR = TM.getInstrInfo()->CreateTargetPostRAHazardRecognizer(InstrItins); AntiDepBreaker *ADB = |