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author | Dale Johannesen <dalej@apple.com> | 2010-03-05 00:02:59 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2010-03-05 00:02:59 +0000 |
commit | 2061c84109fb36f34745a700bc5283e13b51d736 (patch) | |
tree | 5cd3a45ba9cdfd4247c0484185f7fd0146cbf7ba /llvm/lib/CodeGen/PostRASchedulerList.cpp | |
parent | 9984bd6092e75b32e3f30bc486d5b0ee8af9e942 (diff) | |
download | llvm-2061c84109fb36f34745a700bc5283e13b51d736.zip llvm-2061c84109fb36f34745a700bc5283e13b51d736.tar.gz llvm-2061c84109fb36f34745a700bc5283e13b51d736.tar.bz2 |
Fix some more places where dbg_value affected codegen.
llvm-svn: 97765
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
-rw-r--r-- | llvm/lib/CodeGen/PostRASchedulerList.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp index f43395f..424181c 100644 --- a/llvm/lib/CodeGen/PostRASchedulerList.cpp +++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp @@ -460,6 +460,8 @@ void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) { for (MachineBasicBlock::iterator I = MBB->end(), E = MBB->begin(); I != E; --Count) { MachineInstr *MI = --I; + if (MI->isDebugValue()) + continue; // Update liveness. Registers that are defed but not used in this // instruction are now dead. Mark register and all subregs as they |