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author | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2019-09-13 17:37:30 +0000 |
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committer | Alexander Timofeev <Alexander.Timofeev@amd.com> | 2019-09-13 17:37:30 +0000 |
commit | 9ff70132bf89e213f45e54cd2d79a611d14b3d0b (patch) | |
tree | 68ff8e7d4a3fb6a2831f55d6de4c3d87fc9c1230 /llvm/lib/CodeGen/PHIElimination.cpp | |
parent | 713da8db39bb4cd1f9a1a5e67b255f6156e8929d (diff) | |
download | llvm-9ff70132bf89e213f45e54cd2d79a611d14b3d0b.zip llvm-9ff70132bf89e213f45e54cd2d79a611d14b3d0b.tar.gz llvm-9ff70132bf89e213f45e54cd2d79a611d14b3d0b.tar.bz2 |
Revert for: [AMDGPU]: PHI Elimination hooks added for custom COPY insertion.
llvm-svn: 371873
Diffstat (limited to 'llvm/lib/CodeGen/PHIElimination.cpp')
-rw-r--r-- | llvm/lib/CodeGen/PHIElimination.cpp | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp index 8ffd62b..2b3ce89 100644 --- a/llvm/lib/CodeGen/PHIElimination.cpp +++ b/llvm/lib/CodeGen/PHIElimination.cpp @@ -31,9 +31,7 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/SlotIndexes.h" #include "llvm/CodeGen/TargetInstrInfo.h" -#include "llvm/CodeGen/TargetLowering.h" #include "llvm/CodeGen/TargetOpcodes.h" -#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/Pass.h" @@ -254,12 +252,11 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, // Insert a register to register copy at the top of the current block (but // after any remaining phi nodes) which copies the new incoming register // into the phi node destination. - MachineInstr *PHICopy = nullptr; const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); if (allPhiOperandsUndefined(*MPhi, *MRI)) // If all sources of a PHI node are implicit_def or undef uses, just emit an // implicit_def instead of a copy. - PHICopy = BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), + BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); else { // Can we reuse an earlier PHI node? This only happens for critical edges, @@ -276,13 +273,15 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); } - // Give the target possiblity to handle special cases fallthrough otherwise - PHICopy = TII->createPHIDestinationCopy(MBB, AfterPHIsIt, MPhi->getDebugLoc(), - IncomingReg, DestReg); + BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), + TII->get(TargetOpcode::COPY), DestReg) + .addReg(IncomingReg); } // Update live variable information if there is any. if (LV) { + MachineInstr &PHICopy = *std::prev(AfterPHIsIt); + if (IncomingReg) { LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); @@ -303,7 +302,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, // killed. Note that because the value is defined in several places (once // each for each incoming block), the "def" block and instruction fields // for the VarInfo is not filled in. - LV->addVirtualRegisterKilled(IncomingReg, *PHICopy); + LV->addVirtualRegisterKilled(IncomingReg, PHICopy); } // Since we are going to be deleting the PHI node, if it is the last use of @@ -313,14 +312,15 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, // If the result is dead, update LV. if (isDead) { - LV->addVirtualRegisterDead(DestReg, *PHICopy); + LV->addVirtualRegisterDead(DestReg, PHICopy); LV->removeVirtualRegisterDead(DestReg, *MPhi); } } // Update LiveIntervals for the new copy or implicit def. if (LIS) { - SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(*PHICopy); + SlotIndex DestCopyIndex = + LIS->InsertMachineInstrInMaps(*std::prev(AfterPHIsIt)); SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB); if (IncomingReg) { @@ -406,9 +406,9 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, if (DefMI->isImplicitDef()) ImpDefs.insert(DefMI); } else { - NewSrcInstr = - TII->createPHISourceCopy(opBlock, InsertPos, MPhi->getDebugLoc(), - SrcReg, SrcSubReg, IncomingReg); + NewSrcInstr = BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(), + TII->get(TargetOpcode::COPY), IncomingReg) + .addReg(SrcReg, 0, SrcSubReg); } } @@ -457,7 +457,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, } } else { // We just inserted this copy. - KillInst = NewSrcInstr; + KillInst = std::prev(InsertPos); } } assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); |