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author | Pengcheng Wang <wangpengcheng.pp@bytedance.com> | 2024-04-24 16:58:37 +0800 |
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committer | GitHub <noreply@github.com> | 2024-04-24 16:58:37 +0800 |
commit | d149370900844cca3fec06bb078eb8d85008f72d (patch) | |
tree | dede4cdd839634395ee863115f7bc2cc741f4f13 /llvm/lib/CodeGen/ModuloSchedule.cpp | |
parent | 91526d64a8adb14edc55adfd5270858791822837 (diff) | |
download | llvm-d149370900844cca3fec06bb078eb8d85008f72d.zip llvm-d149370900844cca3fec06bb078eb8d85008f72d.tar.gz llvm-d149370900844cca3fec06bb078eb8d85008f72d.tar.bz2 |
[RISCV] Add test coverage for commutable RVV instructions
This patch adds test coverage for commutable RVV instructions
added in #88379.
For each kind of instruction, I add two tests (one for unmasked and
one for masked). These tests don't cover all the SEWs/LMULs as I
think it's not worthy because there is no difference when handling
instructions with different SEWs/LMULs.
As the tests shown, we can't eliminate two equal instructions if
there is a use of `V0`. This may be fixed in the future.
Reviewers: asb, jacquesguan, topperc, lukel97, preames
Reviewed By: lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/89889
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions