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| author | wangpc <pc.wang@linux.alibaba.com> | 2022-01-07 12:29:25 +0800 |
|---|---|---|
| committer | wangpc <pc.wang@linux.alibaba.com> | 2022-01-07 12:29:58 +0800 |
| commit | 91cf2a9b6c3ca3a205988b6f752944d76fc2fac4 (patch) | |
| tree | e0167874cefcb60d70eefd351ea0a6d5ea8726c1 /llvm/lib/CodeGen/ModuloSchedule.cpp | |
| parent | bd23dffc2c38b7cffd3811716fd373cd2b588c27 (diff) | |
| download | llvm-91cf2a9b6c3ca3a205988b6f752944d76fc2fac4.zip llvm-91cf2a9b6c3ca3a205988b6f752944d76fc2fac4.tar.gz llvm-91cf2a9b6c3ca3a205988b6f752944d76fc2fac4.tar.bz2 | |
[RISCV][NFC] Use sub operator to generate register list
There are several duplicated lines for generating GPRXXX's
register list that can be eliminated by using `sub` operator.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D116729
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions