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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-10-11 10:41:09 -0700 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2022-10-12 17:25:24 -0700 |
| commit | 575eed3dace3c9c741cfc47be02ea1dee4b0402b (patch) | |
| tree | 6ea92be268afc30f646fcb40a09b9107d85fcacc /llvm/lib/CodeGen/ModuloSchedule.cpp | |
| parent | c23ac22f0ed9b76f127794534b3dfd5557389aed (diff) | |
| download | llvm-575eed3dace3c9c741cfc47be02ea1dee4b0402b.zip llvm-575eed3dace3c9c741cfc47be02ea1dee4b0402b.tar.gz llvm-575eed3dace3c9c741cfc47be02ea1dee4b0402b.tar.bz2 | |
AMDGPU: Fix hazard with v_accvgpr_write_b32 and inline asm VGPR defs
If inline asm has a VGPR def, it must have come from a VGPR write
somewhere inside the asm. This should be further extended to all
read after write hazards.
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions