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| author | Craig Topper <craig.topper@sifive.com> | 2022-06-17 20:58:21 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-06-18 11:06:45 -0700 |
| commit | 545a71c0d66eb93eb47ad49ec6f91965cca8f137 (patch) | |
| tree | f7ca062387279c164b7355e66535999a26d8f643 /llvm/lib/CodeGen/ModuloSchedule.cpp | |
| parent | af6d2a0b6825e71965f3e2701a63c239fa0ad70f (diff) | |
| download | llvm-545a71c0d66eb93eb47ad49ec6f91965cca8f137.zip llvm-545a71c0d66eb93eb47ad49ec6f91965cca8f137.tar.gz llvm-545a71c0d66eb93eb47ad49ec6f91965cca8f137.tar.bz2 | |
[RISCV] Pre-promote v1i1/v2i1/v4i1->i1/i2/i4 bitcasts before type legalization
Type legalization will convert the bitcast into a vector store and
scalar load.
Instead this patch widens the vector to v8i1 with undef, and bitcasts
it to i8. v8i1->i8 has custom handling for type legalization already to
bitcast to a v1i8 vector and use an extract_element.
The code here was lifted from X86's avx512 support.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D128099
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions