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| author | alex-t <alexander.timofeev@amd.com> | 2020-09-16 19:54:29 +0300 |
|---|---|---|
| committer | alex-t <alexander.timofeev@amd.com> | 2020-09-17 17:34:33 +0300 |
| commit | 0efbb70b719e990fe153373eda5a604344ae36bb (patch) | |
| tree | aaafb22339903a2dff3f51ed4dd41951bb7a2921 /llvm/lib/CodeGen/ModuloSchedule.cpp | |
| parent | 9339f68f21facc34fb0901045d571c818e1fa84a (diff) | |
| download | llvm-0efbb70b719e990fe153373eda5a604344ae36bb.zip llvm-0efbb70b719e990fe153373eda5a604344ae36bb.tar.gz llvm-0efbb70b719e990fe153373eda5a604344ae36bb.tar.bz2 | |
[AMDGPU] should expand ROTL i16 to shifts.
Instruction combining pass turns library rotl implementation to llvm.fshl.i16.
In the selection dag the intrinsic is turned to ISD::ROTL node that cannot be selected.
Need to expand it to shifts again.
Reviewed By: rampitec, arsenm
Differential Revision: https://reviews.llvm.org/D87618
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions