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| author | Craig Topper <craig.topper@intel.com> | 2019-09-21 06:44:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-21 06:44:29 +0000 |
| commit | 04682939eb7e5ff06ec7e50cbe205b5c0069285f (patch) | |
| tree | 9cbd34fc1c1ad7667679ec83f9f7210a1502315f /llvm/lib/CodeGen/ModuloSchedule.cpp | |
| parent | 4fa12ac92ced6dafdaf1e7c7e7a4b86d774e0b83 (diff) | |
| download | llvm-04682939eb7e5ff06ec7e50cbe205b5c0069285f.zip llvm-04682939eb7e5ff06ec7e50cbe205b5c0069285f.tar.gz llvm-04682939eb7e5ff06ec7e50cbe205b5c0069285f.tar.bz2 | |
[X86] Use sse_load_f32/f64 and timm in patterns for memory form of vgetmantss/sd.
Previously we only matched scalar_to_vector and scalar load, but
we should be able to narrow a vector load or match vzload.
Also need to match TargetConstant instead of Constant. The register
patterns were previously updated, but not the memory patterns.
llvm-svn: 372458
Diffstat (limited to 'llvm/lib/CodeGen/ModuloSchedule.cpp')
0 files changed, 0 insertions, 0 deletions